Developing a CPU Simulator for use in the Classroom
In a computer architecture course an understanding of the processor is an integral part of the course. Discussion and reading how a processor works is one avenue through which this can be accomplished, but not all students learn through these means. This paper describes an alternate or augmentary solution to this problem, which comes in the form of Chameleon. Chameleon is a processor simulator that enables students to view a processor step by step as it executes fragments of code. This program was also written to compliment the MIPS processor designs presented in Patterson's and Hennessy's Computer Organization & Design: The Hardware/Software Interface, which is one of the most widely used Computer Architecture books.